250nm Technology Based Low Power SRAM Memory

High integration density, low power and fastperformance are all critical parameters in designing of memory blocks. Static Random Access Memories (SRAMs)’s focusing on optimizing dynamic power concept of virtual source transistors is used for removing direct connection between VDD and GND. Also stacking effect can be reduced by switching off the stacktransistors when the memory is ideal and the leakage current using SVL techniques This paper discusses the evolution of 9t SRAM circuits in terms of low power consumption, The whole circuit verification is done on the Tanner tool, Schematic of the SRAM cell is designed on the S-Edit and net list simulation done by using T-spice and waveforms are analyzed through the W-edit.